As is well known, multilevel printed circuit boards carry conductive runs on their surfaces with terminations that are drilled to accept either plating such as in a plated through hole or to accept pin conductors from cables or other discrete devices. In order to assure the proper interconnection of these electrical conductors the alignment of each of the layers must be within some preselected assembly tolerance.
In R. Brabetz U.S. Pat No. 4,432,037 entitled, "MULTI-LAYER PRINTED CIRCUIT BOARD AND METHOD FOR DETERMINING THE ACTUAL POSITION OF INTERNALLY LOCATED TERMINAL AREAS" there is disclosed a method which uses a probe for determining the amount of skew or distortion that has taken place in the layers during the assembly and pressing operation prior to drilling the plated through hole connections. If the order of the layers is not correct this method will not be able to detect the mis-order.
Another patent of interest for its teachings is R. E. Braun et al. U.S. Pat. No. 4,510,446 entitled, "TEST COUPONS FOR DETERMINING THE REGISTRATION OF SUBSURFACE LAYERS IN A MULTI-LAYER PRINTED CIRCUIT BOARD". In that patent, the internal registration of the various layers is checked by inserting a conductive probe through a series of plated through holes. By making some of the holes with different diameters it can be determined when the layers with these holes are misaligned past an acceptable tolerance because the conductive probe will sense the metal contact on the inner walls of the hole causing a change in current flow from the probe through the conductors connected to the plated through hole or a change in the resistance values sensed by the probe. As well as this system works for determining the registration of the layers it cannot determine the order of the layers.
Still another patent of particular interest is R. F. Benson U.S. Pat. No. 4,536,239 entitled, "MULTI-LAYER CIRCUIT BOARD INSPECTION SYSTEM". In that patent there is disclosed a system for verifying the registration between layers of a multi-level circuit board during assembly. The method uses two identical patterns on at least two layers. The alignment of these two patterns is viewed relative to a test pattern via radiography techniques. This particular method also will not be able to determine if one or more of the layers of the multi-layer board are in the wrong order.
The sequential order of assembly of multi-level circuit boards is important because an incorrect order can change the impedance between layers, the designed capacitance between layers, and the proper thicknesses between layers. These requirements are above and beyond conductivity checks, which only test DC performance. A multi-layer printed circuit board can pass a conductivity test but be unreliable or useless at the frequencies it was designed to operate at due to improper order of assembly of its layers.